ZedBoard SDR


FPGA Based Board

ZedBoard is a low-cost development board for the Xilinx Zynq-7000 all programmable SoC (AP SoC).

This board contains everything necessary to create a Linux_, Android_, Windows_, or other OS/RTOS based design.

Additionally, several expansion connectors expose the processing system and programmable logic I/Os for easy user access.

Take advantage of the Zynq-7000 AP SoCs tightly coupled ARM_ processing system and 7-series programmable logic to

create unique and powerful designs with the ZedBoard.

Target applications include video processing, motor control, software acceleration, Linux/Android/RTOS development,

embedded ARM processing, and general Zynq-7000 AP SoC prototyping.

The ZedBoard kit is supported by the www.zedboard.org community website where users can collaborate with other

engineers also working on Zynq designs.


Features(FPGA Board):

    Xilinx Zynq-7000 AP SoC XC7Z020-CLG484

    Dual-core ARM Cortex�-A9

    512 MB DDR3

    ‧ 256 MB Quad-SPI Flash

    ‧ 4 GB SD card

    ‧ On-board USB-JTAG Programming

    10/100/1000 Ethernet

    ‧ USB OTG 2.0 and USB-UART

    Analog Devices ADAU1761 SigmaDSP_ Stereo,

       Low Power, 96 kHz, 24-Bit Audio Codec

    ‧ Analog Devices ADV7511 High Performance 225 MHz

       HDMI Transmitter (1080p HDMI, 8-bit VGA, 128x32 OLED)

    ‧ PS & PL I/O expansion (FMC, Pmod, XADC)


Target Applications:

    ‧ Video processing

    Motor control

    ‧ Software acceleration

    ‧ Linux/Android/RTOS development

    ‧ Embedded ARM processing

    ‧ General Zynq-7000 AP SoC prototyping

Kit Includes:

    ‧ Avnet ZedBoard 7020 baseboard

    ‧ 12 V AC/DC power supply

    ‧ 4 GB SD Card

    Micro-USB cable

    ‧ USB Adapter: Male Micro-B to Female Standard-A

    ‧ Getting Started Guide

    ‧ Custom Digilent cardboard box with protective foam

    Xilinx Vivado_ Design Edition license voucher

       (device locked to 7Z020)

Integrated RF Board

The AD-FMCOMMS3-EBZ is a high-speed analog module designed to showcase the AD9361,

a high performance, highly integrated RF transceiver intended for use in RF applications,

such as 3G and 4G base station and test equipment applications, and software defined radios.

Its programmability and wideband capability make it ideal for a broad range of transceiver applications.

The device combines an RF front end with a flexible mixed-signal baseband section and integrated frequency synthesizers, simplifying design-in by providing a configurable digital interface to a processor or FPGA.

The AD9361 chip operates in the 70 MHz to 6 GHz range, covering most licensed and unlicensed bands.

The chip supports channel bandwidths from less than 200 kHz to 56 MHz by changing sample rate, digital filters, and decimation, which are all programmable within the AD9361 itself.


Features(RF Board):

‧ Full comparable to ADI FMCOMMS3

‧ RF 2 × 2 transceiver with integrated 12-bit DACs and ADCs

‧ Band: 70 MHz to 6.0 GHz

‧ Supports TDD and FDD operation

‧ Tunable channel bandwidth: <200 kHz to 56 MHz

‧ RX automatic gain control

‧ TX EVM: __40 dB

‧ TX noise: __157 dBm/Hz noise floor

‧ TX monitor: _66 dB dynamic range with 1 dB accuracy

‧ Integrated fractional-N synthesizers

‧ 2.4 Hz maximum LO step size

‧ Multichip synchronization

‧ 40MHz reference clock embedded

‧ Power by single FMC connector


整合MATLAB & Simulink communication system toolbox support hardware package


     MATLAB & Simulink 環境下自傳自收之訊號驗證

     具時間同步及載波同步之QPSK Receiver電路



     基於MATLAB & Simulink之軟體無線電環境建立


     使用MATLAB & Simulink環境進行VHDL/Verilog code之產生,並自動燒錄至FPGA中進行驗證。