產品應用
- Advanced digital radio frequency memory (DRFM)
- Radar waveform generators and receivers
- Telecommunicaton systems
- Experimental Physics
- Analog record and playback systems
- Aerospace and test instrumentation
- Software defined radio (SDR)
8 通道 35.4GSPS, 12位元低延遲寬頻接收
A combination of low latency wideband analog to digital converter, digital to analog converter and Xilinx Kintex Ultrascale makes the LXF33K00 the ideal platform for embedded signal processing applications such as Electronic Warfare, Wideband Radar transceiver or wideband communication applications. The LXF33K00 is fully compliant to the Vita65.0 openVPX standard and the VITA46.11 VPX shelf management standard.
類比輸入
With an analog input stage that has a very wide input bandwidth from 0.5MHz up-to 4.8GHz and the low latency 5.4Gsps ADC from E2V(EV12AS350A) the LXF33K00 delivers unmatched performance with regards to SFDR, close in phase noise and latency (7.2 ns). Sampling at 5.4 Gsps offers an instantaneous bandwidth of 2.7GHz. Surpassing the analog input, the analog output offers an even lower latency (1.2 ns) using the EV12DS460 DAC device from E2V. The output bandwidth ranges from 0.5MHz to 6GHz and the instantaneous output bandwidth is 1.35GHz. Both the ADC and DAC offer 12-bits resolution further contributing to achieve best in class signal to noise ratios.
時脈功能
The onboard low noise clock generator ensures easy integration into small single board systems as well as standalone operation. For larger systems it is possible to easily synchronize multiple boards by providing an external reference clock. This is a special feature offered by the onboard clock PLL.
FPGA與記憶體
The LXF30K00 comprises a Xilinx Kintex Ultrascale KU060 user programmable FPGA. Most of the logic, block RAM and all DSP resources are available for customer processing. With the KU060 FPGA the LXF33K00 offers; 663 K logics cells, 1,080 36 Kbit RAM blocs, 3 PCIe interface blocks and 2,760 DSP48 slices. The FPGA speed grade is -2. The LXF3000 FPGA connects to one 72 bits wide DDR4 memory bank, offering a total of 4GB of storage with error correction codes. At 2400 Mhz the memory bank offers a total bandwidth of 21.6 GB/s. For FPGA configuration the LXF33K00 has a 64MB QSPI FLASH memory.
VPX介面
At the P1 connector the LXF33K00 has two fat pipes that form the data plane. At the expansion plane on P1 there are also two FAT pipes. Each fat pipe can be divided into two thin pipes or four ultra thin pipes. A total of thirty-two user definable LVDS signals connect between the FPGA and the VPX P2 connector. Two types of cooling are supported by the LXF33K00. For the harsher environmental conditions, the board can be ordered in the conduction cooled version. Otherwise the board is available in an air-cooled version.
產品規格
Number of analog input channels：1
Number of analog output channels：1
Front panel IO connector type：SSMC
Front panel IO type：ADC/DAC
FPGA type：Kintex Ultrascale - KU060 (530K logic Cells, 38Mb Block RAM, 2760 DSP slices)
Form Factor：VPX - 3U (VITA65.0 3U OpenVPX compliant)
Analog input specification
Input coupling：AC coupled
Input maximum sample rate：5.4 Gsps
Input number of bits：12 bits resolution
Impedance：50 Ω
Input bandwidth AC coupled：0.5 MHz - 4.8 MHz
Input AC full scale power：+8.5 dBm
Legislation and Environmental (符合歐洲法規標準)
Supported operating temperature：Commercial (0°C ~ 70°C) and Industrial (-40°C ~ 85°C)
Ruggedization：standard Commercial Air-cooled and Rugged Conduction- cooled
ROHS Compliant：Yes - RoHS Phthalates Compliant
SVHC：Product contains no SVHC
Country of origin：the Netherlands (Europe) (荷蘭製造生產)
ECCN ：3A002.h.1.c.2.c
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產品文件：產品規格表 |
